cadr runs the CADR, the reference, with MIT’s own microcode and MIT’s last release. Steps 01 and 02 on the simulator’s page build it.
03
MIT’s last release.
tools/fetch-system-100-for-cadr.sh
System 100, the CADR’s: a disk pack, a file that stands in for the machine’s disk and holds its microcode and a band, the saved Lisp world it boots into; and the system’s sources. Neither is part of muir-sim: the script fetches them and checks every file against its SHA-256 sum. muir-sys also evolves a system for the CADR, on the CADR’s own line of releases: tools/fetch-system-for-cadr.sh fetches its release, and its release notes give the ozd and cadr commands.
cadr on the everyday engine, rtl, booting System 100 off the pack. The Chaosnet is the machine’s network, and this band expects to be machine 3050 on it and to ask host 3060 for the date and for its files. It prints where its screen is: point any VNC viewer there.
The host at 3060 is ozd, the CADR’s associated machine. A band that reaches no host boots all the same, but stops to ask for the date: Super-B at the debugger, then the date and time it asks for and y, finish it.
02 / MAKING A PACK
A pack of your own.
The fetched pack is not the only one. diskpack, built beside cadr and quux, makes a CADR pack of your own and edits its label: partitions added, grown, zeroed and deleted, microcode and bands loaded and dumped. This makes one with MIT’s microcode and the band of its last release, the fetched pack’s LOD2, to boot with --disk-pack mine.img:
Every box is a board of the CADR, simulated from MIT’s schematics on chip and as a model of the board on the other two engines; this is how muir-sim puts them together. The boards, the buses and the seven netlists are on the CADR’s page.
FIG. 02 — THE MACHINE, AS MUIR-SIM PUTS IT TOGETHERMUIR-SIM
The processor is not one board and the bus interface is not part of it: they live in different backplanes and talk over five 40-wire flat cables carrying two buses and the master clock. Everything else in the machine hangs off one of those two buses. What the machine itself is, apart from anything that models it, is on the CADR’s page: the cage and its two buses, the processor, the map, the boards.
Every board a netlist at once, and MIT’s system cold-booted through them — twice. Each run is more than 60 hours of gate-level simulation: 2 days 14 hours and 301 million microcycles on 12 September 2026, and 2 days 21 hours and 306 million with the disk multiplexor fitted as well on 15 September 2026. The machine’s own report at the end of each, printed in its who-line, was Cold-booted.
04 / THE ACCEPTANCE TEST
Two machines, one debugging the other.
A real CADR could be debugged from another CADR. A cable joined the two machines’ bus interfaces, and a program on one could stop the other, step it and read out its insides, even when its own software had crashed. That program is CC, MIT’s console debugger for the machine.
muir-sim’s acceptance test is exactly that. Two simulated machines are joined by the simulated debug cable. The first boots System 100, logs in and loads CC over the network; CC then halts the second machine and reads back where it had got to. It passes only if the processor, memory, disk, network, file loading and both ends of the debug cable all behave as MIT built them.
The acceptance test, recorded as it ran: CC on the left machine seizes the right one through the debug cable, and the right screen goes still at that instant and never moves again.
